Digital I/O architecture (output port) In a typical microprocessor or microcontroller system, which hardware circuit is placed at the interface of an output port so that written data is held stable and presented to the external device until the next write?

Introduction / Context:
An output port is the hardware point where a processor's internal data bus hands data off to the outside world (LEDs, relays, DACs, and so on). The circuit used must capture the value during a write cycle and hold it stable long after the bus has moved on to other operations.

Given Data / Assumptions:

• The CPU provides brief write strobes (WR) and address selects (chip select) to target a port.
• External devices often need a steady logic level, not a momentary pulse on the system bus.
• The output port must remember (store) the last data until a new write occurs.

Concept / Approach:
A transparent latch or an edge-triggered register captures data from the data bus when the write strobe and the address decoder indicate an addressed write. After the brief write, the bus releases the data lines, but the latch continues to drive the external pins with the stored value. This separation of capture and hold action is the essence of an output port.

Step-by-Step Solution:

Verification / Alternative check:
Observe with a logic analyzer: bus data exists only for the write window, yet the port pin stays at the written level afterwards—proof that storage (latching) is occurring.

Why Other Options Are Wrong:

• Decoder: Selects the device; it does not store data.
• Tristate buffer: Controls bus direction/connection; it doesn't remember values.
• None of the above: Incorrect because a latch is the standard solution.

Common Pitfalls:
Confusing input and output port hardware: inputs typically use tristate buffers to place data onto the bus only when selected, while outputs require storage to maintain levels.

Final Answer:
latch