Sample-and-hold (S/H) — basic building blocks: A practical sample-and-hold circuit typically consists of which combination of elements?

Introduction / Context:
Sample-and-hold (S/H) circuits are indispensable in data acquisition. They capture an analog voltage at a specific time and hold it stable for conversion or processing. Knowing the core components clarifies how performance metrics such as acquisition time, droop rate, and aperture uncertainty arise.

Given Data / Assumptions:

• Classic S/H topology with a buffer, an analog switch (or transmission gate), and a hold capacitor.
• Goal: low droop during hold and fast, accurate sampling during track.
• Idealized understanding; detailed nonidealities acknowledged qualitatively.

Concept / Approach:
During “sample/track,” the analog switch conducts, connecting the input to the hold capacitor through a low impedance (buffered by an op-amp). The capacitor charges to the input voltage. During “hold,” the switch opens, isolating the capacitor, while the op-amp buffer drives the output with the stored voltage. No inductor is required; in fact, inductance would hinder fast settling. Additional op-amps can appear in precision ICs, but the minimal functional trio is op-amp + analog switch + capacitor.

Step-by-Step Solution:

Verification / Alternative check:
S/H IC datasheets (e.g., LF398-class) show an internal switch-capacitor front end and op-amp buffer. System-level S/H in ADC front-ends follow the same block diagram.

Why Other Options Are Wrong:

• Inductor: Not part of the canonical S/H; adds unwanted dynamics.
• Two op-amps/variable resistor: Possible in advanced designs, but not the minimal necessary set.
• Comparator/diode bridge: Used in other functions (e.g., rectification, decision), not S/H.

Common Pitfalls:
Underestimating the role of the buffer in reducing droop and kickback; ignoring switch charge injection which degrades hold accuracy if not managed.

Final Answer:
an op-amp, an analog switch, and a capacitor.