RC integrator under pulses — when a repetitive-pulse waveform drives an RC integrator, does the output waveshape depend on the relationship between the time constant τ and the pulse duty cycle/width?

Introduction / Context:
RC “integrators” and “differentiators” are first-order networks whose actual output shape depends on how the input timing compares with the natural time constant τ = R * C. With repetitive pulses, designers can choose τ to emphasize integration (slow change) or near-square tracking (full settling). Duty cycle also matters because it changes the high/low durations of each cycle.

Given Data / Assumptions:

• Input: repetitive pulses with a defined duty cycle D.
• Circuit: RC with output observed across the capacitor (typical integrator view).
• Lumped linear components and negligible loading.

Concept / Approach:
If τ ≫ pulse width, the capacitor voltage changes only slightly during each pulse, approximating a scaled integral of the waveform (ramp-like). If τ ≪ pulse width, the capacitor reaches near its final value during the high interval and returns near the low level afterward, producing a waveform closer to the rectangular input. Changing duty cycle alters the relative lengths of charge and discharge intervals, shifting the DC level and the waveform shape in steady state.

Step-by-Step Solution:

Verification / Alternative check:
Use v_C(t) = V_final + (V_initial − V_final) * exp(−t/τ) on high and low intervals; steady-state levels result from equalizing end-of-interval conditions over one period.

Why Other Options Are Wrong:

• “Only amplitude” or “only frequency”: incomplete; τ and the exact time lengths control exponential settling.
• “Depends solely on ESR”: ESR slightly perturbs τ and damping but is not the dominant factor.

Common Pitfalls:
Calling any RC with a pulse an “integrator” regardless of τ; neglecting the effect of non-50% duty on the average output level.

Final Answer:
Correct — output shape depends on τ and the duty-cycle timing.