Identifying the gate with LOW output when any input is zero In positive-logic digital circuits, which gate outputs a LOW whenever one or more inputs are logic 0?

Introduction / Context:Selecting the correct logic gate is a foundational skill in digital design. This question targets recognition of the gate whose output immediately drops LOW if any input is LOW.

Given Data / Assumptions:

• Positive logic (HIGH = 1, LOW = 0).
• Ideal gate behavior (ignoring propagation delay and noise for the concept).
• Two or more inputs possible.

Concept / Approach:The AND gate is defined by Y = A * B * C * … . In Boolean algebra, the product is 1 only if every factor equals 1. Consequently, if any input is 0, the product becomes 0 and the output is LOW. This directly matches the description.

Step-by-Step Solution:Write the Boolean function: Y = A1 * A2 * … * An.Consider any single input Ai = 0: Y = 0 * (rest) = 0.Thus, for any input at 0, the output is forced LOW.Therefore, the described gate behavior belongs to AND.

Verification / Alternative check:Truth table for a 2-input AND shows outputs 1 only for (1,1); all other combinations with a 0 produce 0. Extending to more inputs preserves this rule.

Why Other Options Are Wrong:OR gate: outputs 1 if any input is 1; contradicts the prompt.NOT gate: single-input inverter; behavior not described by multiple inputs.NAND gate: outputs LOW only when all inputs are 1; not when any input is 0.

Common Pitfalls:Confusing NAND with AND because both are related; remember NAND is the complement of AND and is HIGH whenever any input is 0.

Final Answer:AND gate