Match the controllers to their roles: (A) DMA controller, (B) CRT (display) controller, (C) Interrupt controller — with (1) Interface between computer and video display adapter, (2) Used to read data directly from disk into main memory, (3) Supervises/coordinates interrupt request signalling.

Introduction:
This question checks fundamental computer-organization knowledge: differentiating between DMA, display, and interrupt controllers. Each controller solves a distinct bottleneck in data movement, display timing, or interrupt handling.

Given Data / Assumptions:

• A: DMA controller — offloads block transfers between I/O and memory.
• B: CRT controller — legacy term for video/display adapter timing and interfacing.
• C: Interrupt controller — arbitrates and prioritizes interrupt signals to the CPU.
• Roles: (1) video interface, (2) direct memory access for disk-to-memory reads, (3) interrupt signalling supervision.

Concept / Approach:

DMA eliminates CPU involvement in byte/word transfers, improving throughput. The CRT (or display) controller generates necessary raster timing and interacts with the display adapter/framebuffer. The interrupt controller (e.g., PIC) collects, prioritizes, and signals interrupts to the processor, simplifying CPU external-interrupt handling.

Step-by-Step Solution:

Verification / Alternative check:

Classic PC architecture (e.g., 8237 DMA, 6845/CRT controllers, 8259 PIC) demonstrates these roles distinctly.

Why Other Options Are Wrong:

Swapping these roles conflates data movement (DMA), video timing (CRT), and event signalling (PIC), which are architecturally separate.

Common Pitfalls:

Assuming modern GPUs or APICs change fundamentals; despite evolution, DMA handles block transfers, display controllers handle timing, and PIC/APIC manage interrupts.

Final Answer:

A-2, B-1, C-3