Common-emitter (CE) amplifier with a series R–L load: considering that a CE stage inverts phase by about 180°, and the load impedance Z_L consists of a resistor R in series with an inductor L (which introduces additional positive phase lead between current and voltage), what will be the overall phase difference between the input signal and the output voltage across the load?

Introduction / Context:
In analog electronics, understanding phase relationships through active devices and reactive loads is essential for correct signal interpretation and stability analysis. A common-emitter (CE) amplifier inherently produces a phase inversion of approximately 180° between its small-signal input (base) and output (collector). When the load is not purely resistive but contains inductance, the output voltage across that load gains an additional phase lead with respect to the collector current.

Given Data / Assumptions:

• Topology: single-stage CE amplifier.
• Load impedance: Z_L = R + jωL (series R–L).
• Small-signal operation; transistor internal phase shift around midband is ~180°.
• The inductor causes the load voltage to lead the load current by an angle φ where 0° < φ < 90°.

Concept / Approach:

In a CE stage, v_out (collector) is inverted with respect to v_in (base), giving 180°. The R–L series load has voltage that leads its current by the load angle φ = tan^-1(ωL/R). Since the collector current (and hence load current) largely follows the input with the 180° inversion already accounted for, the final load voltage leads the inverted current by φ, yielding a total phase shift of 180° + φ where 0° < φ < 90°.

Step-by-Step Solution:

Verification / Alternative check:

If L = 0 (purely resistive), φ = 0° and the phase is 180°. If R → 0 (nearly pure L), φ → 90° and the limit approaches 270°, confirming the range.

Why Other Options Are Wrong:

• 0°: contradicts CE inversion.
• 180°: valid only for purely resistive load.
• More than 90° but less than 180°: underestimates the CE inversion.
• Exactly 270°: would require ideal pure inductance (impractical midband).

Common Pitfalls:

• Forgetting that the phase of voltage across an inductive load leads the current.
• Confusing transistor internal small-signal delay with the fixed 180° inversion of CE configuration.

Final Answer:

More than 180° but less than 270°.