The 7475 is a classic TTL/CMOS IC that implements four transparent D latches (a 4-bit bistable latch) within a single package. Evaluate this identification.

Introduction / Context:
Device numbering in the 74xx family can be confusing. The 7475 (and its CMOS variants) is historically referenced as a 4-bit D latch device, commonly used for temporary data storage and bus interfacing with level-sensitive transparency control.

Given Data / Assumptions:

• “Transparent” means Q follows D while enable is active; data is latched when enable is inactive.
• Four independent D latches share control pins as specified by the datasheet.
• Outputs may include complementary pins depending on subfamily.

Concept / Approach:
A D latch differs from a D flip-flop: it is level-sensitive (gated), not edge-triggered. The 7475 embodies this by allowing data to flow through when the gate (enable) is active, then holding the last value when the gate is inactive.

Step-by-Step Solution:

Verification / Alternative check:
Cross-reference with standard 74xx family tables: 7475 (quad latch) vs 7474 (dual edge-triggered D flip-flop) illustrates the latch vs flip-flop distinction.

Why Other Options Are Wrong:
It is not an edge-triggered device; thus “Correct only for edge-triggered” is wrong. Tri-state capabilities are separate features on bus latches, not defining characteristics of the 7475 identification.

Common Pitfalls:
Confusing 7475 with 7474 or octal latches like 74HC373. Always check the family code for latch versus flip-flop behavior.

Final Answer:
Correct