FPGA configuration technology Most field-programmable gate arrays (FPGAs) store their configuration using ________ memory technology, which is ________. Choose the most accurate pairing.

Introduction / Context:
FPGAs must load their configuration at power-up. The memory technology used determines whether the device is self-retaining (nonvolatile) or requires an external or internal configuration source each time it powers on. This has implications for boot time, security, and board architecture.

Given Data / Assumptions:

• We are discussing mainstream SRAM-based FPGAs (for example, Intel/Altera, Xilinx families).
• Nonvolatile families (for example, Flash-based) exist but are not the majority.
• Volatile memory loses its contents when power is removed.

Concept / Approach:
Most high-performance FPGAs use static RAM (SRAM) cells to control routing switches and LUT contents. SRAM is volatile, so configuration vanishes at power-off. Therefore, a configuration image must be delivered at boot (via JTAG, a configuration flash, or a processor). Flash-based or antifuse FPGAs are nonvolatile but represent a different subset of the market and usually are not implied by the generic term in this question.

Step-by-Step Solution:

Verification / Alternative check:
Examine vendor datasheets: they state that configuration is loaded from external memory or via programming cable at power-up for SRAM-based devices.

Why Other Options Are Wrong:

• DRAM, nonvolatile: DRAM is also volatile and requires refresh.
• SRAM, nonvolatile: Contradiction; SRAM is volatile.
• RAM, volatile: Too generic; does not specify the specific technology normally used (SRAM).

Common Pitfalls:
Assuming all FPGAs are nonvolatile; overlooking configuration security measures such as bitstream encryption used with volatile storage.

Final Answer:
SRAM, volatile