High-frequency amplifier topology: D-MOSFETs are often stacked in a cascode configuration to mitigate bandwidth loss caused primarily by which effect?

Introduction / Context:
At high frequencies, parasitic capacitances limit gain-bandwidth. The cascode (a common-source feeding a common-gate stage) is a classic way to extend bandwidth by reducing the Miller effect and keeping the gain device's drain at a near-constant AC potential.

Given Data / Assumptions:

• MOSFET intrinsic capacitances (Cgs, Cgd) are present.
• Voltage-gain stages suffer Miller multiplication of Cgd.
• Goal: broader bandwidth and improved stability.

Concept / Approach:
The effective input capacitance seen by a driving source contains Cgd multiplied by (1 − Av), the Miller effect. The cascode holds the drain of the lower device at AC ground (or small swing), dramatically reducing the Miller multiplication and the capacitive loading that otherwise reduces high-frequency gain.

Step-by-Step Solution:
Recognize dominant limitation: Cgd leads to large effective input capacitance.Insert common-gate upper device: its low input impedance at the source keeps the lower drain at small AC swing.Result: reduced capacitive reactance effects → higher bandwidth.

Verification / Alternative check:
AC simulation shows extended −3 dB frequency and flatter gain with cascode compared to single-device CS.

Why Other Options Are Wrong:
High input impedance is beneficial, not a loss mechanism.

Low output impedance is typically improved by cascode for current source behavior, not the main bandwidth limit.

Inductive reactance is usually not the dominant internal parasitic in MOSFET small-signal devices.

Common Pitfalls:
Ignoring layout parasitics; long leads and pads add extra C that undermines cascode benefits.

Final Answer:
capacitive reactance