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- Question
The timing and control block provides the ________ for the frequency counter.
Options- A. brains
- B. BCD counters
- C. display register
- D. six different frequency measurement ranges
- Correct Answer
- brains
- 1. An 8-bit register may provide storage for two's-complement codes within which decimal range?
Options- A. +128 to ?128
- B. ?128 to +127
- C. +128 to ?127
- D. +127 to ?127 Discuss
- 2. When is a flip-flop said to be transparent?
Options- A. when the Q output is opposite the input
- B. when the Q output follows the input
- C. when you can see through the IC packaging Discuss
- 3. A 4-bit stairstep-ramp A/D converter has a clock frequency of 100 kHz and a maximum input of 10 V, and has 6 V applied to the input. The conversion time will be ________.
Options- A. 10 microseconds
- B. 160 microseconds
- C. 90 microseconds
- D. 6250 seconds Discuss
- 4. The abbreviation NO, when used with respect to electromechanical relays, stands for not operational.
Options- A. True
- B. False Discuss
- 5. A sign bit of "1" in the difference of a 2's-complement subtraction problem indicates the magnitude is negative and in true binary form.
Options- A. True
- B. False Discuss
- 6. A push-button switch is used to input data to a register. The output of the register is erratic. What could be causing the problem?
Options- A. The power supply is probably noisy.
- B. The switch contacts are bouncing.
- C. The socket contacts on the register IC are corroded.
- D. The register IC is intermittent and failure is imminent. Discuss
- 7. The power dissipation of a CMOS IC will ________.
Options- A. decrease with frequency
- B. increase with gate size
- C. decrease with gate size
- D. increase with frequency Discuss
- 8. Which of the following is not a weighted value positional numbering system:
Options- A. hexadecimal
- B. binary-coded decimal
- C. binary
- D. octal Discuss
- 9. ________ ADCs have a fixed value of conversion time that is not dependent on the value of the analog input.
Options- A. Substandard
- B. Dual
- C. Recessive-approximation
- D. Successive-approximation Discuss
- 10. A correct output is achieved from a master-slave J-K flip-flop only if its inputs are stable while the:
Options- A. clock is LOW
- B. slave is transferring
- C. flip-flop is reset
- D. clock is HIGH Discuss
More questions
Correct Answer: ?128 to +127
Correct Answer: when the Q output follows the input
Correct Answer: 90 microseconds
Correct Answer: False
Correct Answer: False
Correct Answer: The switch contacts are bouncing.
Correct Answer: increase with frequency
Correct Answer: binary-coded decimal
Correct Answer: Successive-approximation
Correct Answer: clock is HIGH
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