6. A 4-bit stairstep-ramp A/D converter has a clock frequency of 100 kHz and a maximum input of 10 V, and has 6 V applied to the input. The conversion time will be ________.
7. The stability of the ADC process can be improved by using a(n) ________ to hold the analog voltage constant while the A/D conversion is taking place.
8. There are many applications in which analog data must be digitized and transferred into a computer's memory. The process by which the computer acquires these digitized analog data is referred to as ________.