The gates in this figure are implemented using TTL logic. If the output of the inverter is open, and you apply logic pulses to point B, the output of the AND gate will be ________.
Options
A. a steady LOW
B. a steady HIGH
C. an undefined level
D. pulses
Correct Answer
pulses
Logic Gates problems
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1. A NOR gate output is LOW if any of its inputs is LOW.
6. The gates in this figure are implemented using TTL logic. If the output of the inverter has an internal open circuit, what voltage would you expect to measure at the inverter's output?
Correct Answer: Whenever a 1 is present at an input
8. The gates in this figure are implemented using TTL logic. If the input of the inverter is open, and you apply logic pulses to point B, the output of the AND gate will be ________.