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Home ‣ Digital Electronics ‣ Digital System Projects Using HDL See What Others Are Saying!
- Question
Which is not a step that should be followed in project management?
Options- A. Overall definition
- B. System documentation
- C. Synthesis and testing
- D. System integration
- Correct Answer
- System documentation
- 1. The dc noise margins calculated using the proper values from a standard TTL data sheet are the worst-case margins. The typical dc noise margins are usually somewhat higher.
Options- A. True
- B. False Discuss
- 2. There are several ways to construct a stepper motor to achieve digitally controlled stepping action. One possibility is to construct four stator coils set up as four pole pairs, each 45° apart and using three ferromagnetic pairs spaced 60° apart.
Options- A. True
- B. False Discuss
- 3. One CASE construct inside another CASE construct is called a do-loop.
Options- A. True
- B. False Discuss
- 4. As a general rule, the lower the value of the speed?power product, the better the device because of its:
Options- A. long propagation delay and high power consumption
- B. long propagation delay and low power consumption Discuss
- 5. For the device shown here, assume the D input is LOW, both S inputs are HIGH, and the
input is HIGH. What is the status of the 
outputs? 
Options- A. All are HIGH.
- B. All are LOW.
- C. All but
are LOW. - D. All but
are HIGH.
Discuss
- 6. How many 8 k × 1 RAMs are required to achieve a memory with a word capacity of 8 k and a word length of eight bits?
Options- A. Eight
- B. Four
- C. Two
- D. One Discuss
- 7. Which of the following testing procedures has one or more external moving parts?
Options- A. Bed-of-nails
- B. Flying probe
- C. EXTEST
- D. Boundary scan Discuss
- 8. A gated S-R flip-flop is in the hold condition whenever ________.
Options- A. the Gate Enable is HIGH
- B. the Gate Enable is LOW
- C. the S and R inputs are both LOW
- D. the Gate Enable is HIGH and the S and R inputs are both LOW Discuss
- 9. Offset is the characteristic of a DAC defined by the absence of any incorrect step reversals.
Options- A. True
- B. False Discuss
- 10. Zeros may be added to the left of the MSB to produce even groups of 4 bits when converting from binary to hexadecimal.
Options- A. True
- B. False Discuss
More questions
Correct Answer: True
Correct Answer: True
Correct Answer: False
Correct Answer: long propagation delay and low power consumption
Correct Answer: All are HIGH.
Correct Answer: Eight
Correct Answer: Flying probe
Correct Answer: the Gate Enable is HIGH and the S and R inputs are both LOW
Correct Answer: False
Correct Answer: True
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