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Home ‣ Digital Electronics ‣ Combinational Logic Circuits Comments
  • Question

  • As a technician you are confronted with a TTL circuit board containing dozens of IC chips. You have taken several readings at numerous IC chips, but the readings are inconclusive because of their erratic nature. Of the possible faults listed, select the one that most probably is causing the problem.


  • Options
  • A. A defective IC chip that is drawing excessive current from the power supply
  • B. A solar bridge between the inputs on the first IC chip on the board
  • C. An open input on the first IC chip on the board
  • D. A defective output IC chip that has an internal open to Vcc

  • Correct Answer
  • An open input on the first IC chip on the board 

    • Combinational Logic Circuits problems

    Search Results

    • 1. Solve the network in the figure given below for X.


    • Options
    • A. A + BC + D
    • B. ((A + B)C) + D
    • C. D(A + B + C)
    • D. (AC + BC)D
      • Discuss
    • 2. How many 4-bit parallel adders would be required to add two binary numbers each representing decimal numbers up through 30010?

    • Options
    • A. 1
    • B. 2
    • C. 3
    • D. 4
      • Discuss
    • 3. For the device shown here, assume the D input is LOW, both S inputs are HIGH, and the input is HIGH. What is the status of the outputs?


    • Options
    • A. All are HIGH.
    • B. All are LOW.
    • C. All but are LOW.
    • D. All but are HIGH.
      • Discuss
    • 4. How many data select lines are required for selecting eight inputs?

    • Options
    • A. 1
    • B. 2
    • C. 3
    • D. 4
      • Discuss
    • 5. Convert BCD 0001 0010 0110 to binary.

    • Options
    • A. 1111110
    • B. 1111101
    • C. 1111000
    • D. 1111111
      • Discuss
    • 6. What is the indication of a short on the input of a load gate?

    • Options
    • A. Only the output of the defective gate is affected.
    • B. There is a signal loss to all gates on the node.
    • C. The affected node will be stuck in the LOW state.
    • D. There is a signal loss to all gates on the node, and the affected node will be stuck in the LOW state.
      • Discuss
    • 7. For the device shown here, assume the D input is LOW, both S inputs are LOW, and the input is LOW. What is the status of the outputs?


    • Options
    • A. All are HIGH.
    • B. All are LOW.
    • C. All but are LOW.
    • D. All but are HIGH.
      • Discuss
    • 8. A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used on each of the input terminals, but the output indication does not change. What is wrong?

    • Options
    • A. The output of the gate appears to be open.
    • B. The dim indication on the logic probe indicates that the supply voltage is probably low.
    • C. The dim indication is a result of a bad ground connection on the logic probe.
    • D. The gate may be a tristate device.
      • Discuss
    • 9. Which of the circuits in figure (a to d) is the sum-of-products implementation of figure (e)?


    • Options
    • A. a
    • B. b
    • C. c
    • D. d
      • Discuss
    • 10. For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be LOW. What is the status of the Y output?


    • Options
    • A. LOW
    • B. HIGH
    • C. Don't Care
    • D. Cannot be determined
      • Discuss

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