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  • Question
  • An open-drain gate is the CMOS counterpart of ________.


  • Options
  • A. an open-collector TTL gate
  • B. a tristate TTL gate
  • C. a bipolar junction transistor
  • D. an emitter-coupled logic gate

  • Correct Answer
  • an open-collector TTL gate 


  • Integrated Circuit Technologies problems


    Search Results


    • 1. A TTL NAND gate with IIH(max) of 40 µA per input drives ten TTL inputs. How much current does the drive output source?

    • Options
    • A. 40 µA
    • B. 200 µA
    • C. 400 µA
    • D. 800 µA
    • Discuss
    • 2. Which is not an output state for tristate logic?

    • Options
    • A. HIGH
    • B. LOW
    • C. High-Z
    • D. Low-Z
    • Discuss
    • 3. PMOS and NMOS circuits are used largely in ________.

    • Options
    • A. MSI functions
    • B. LSI functions
    • C. diode functions
    • D. TTL functions
    • Discuss
    • 4. In a TTL circuit, if an excessive number of load gate inputs are connected, ________.

    • Options
    • A. VOH(min) drops below VOH
    • B. VOH drops below VOH(min)
    • C. VOH exceeds VOH(min)
    • D. VOH and VOH(min) are unaffected
    • Discuss
    • 5. The active switching element used in all TTL circuits is the ________.

    • Options
    • A. bipolar junction transistor (BJT)
    • B. field-effect transistor (FET)
    • C. metal-oxide semiconductor field-effect transistor (MOSFET)
    • D. unijunction transistor (UJ)
    • Discuss
    • 6. Which factor does not affect CMOS loading?

    • Options
    • A. Charging time associated with the output resistance of the driving gate
    • B. Discharging time associated with the output resistance of the driving gate
    • C. Output capacitance of the load gates
    • D. Input capacitance of the load gates
    • Discuss
    • 7. A certain gate draws 1.8 µA when its output is HIGH and 3.3 µA when its output is LOW. VCC is 5 V and the gate is operated on a 50% duty cycle. What is the average power dissipation (PD)?

    • Options
    • A. 2.55 µW
    • B. 1.27 µW
    • C. 12.75 µW
    • D. 5 µW
    • Discuss
    • 8. One output structure of a TTL gate is often referred to as a ________.

    • Options
    • A. totem-pole arrangement
    • B. diode arrangement
    • C. JBT arrangement
    • D. base, emitter, collector arrangement
    • Discuss
    • 9. The nominal value of the dc supply voltage for TTL and CMOS is ________.

    • Options
    • A. +3 V
    • B. +5 V
    • C. +9 V
    • D. +12 V
    • Discuss
    • 10. If ICCH is specified as 1.1 mA when VCC is 5 V and if the gate is in a static (noncharging) HIGH output state, the power dissipation (PD) of the gate is ________.

    • Options
    • A. 5.5 mW
    • B. 5.5 W
    • C. 5 mW
    • D. 1.1 mW
    • Discuss


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