An 8-bit serial in/serial out shift register is used with a clock frequency of 2

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Question
An 8-bit serial in/serial out shift register is used with a clock frequency of 2 MHz to achieve a time delay (t_d) of ________.
Options
A. 16 µs
B. 8 µs
C. 4 µs
D. 2 µs

Correct Answer

4 µs

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1. A bidirectional 4-bit shift register is storing the nibble 1101. Its input is HIGH. The nibble 1011 is waiting to be entered on the serial data-input line. After three clock pulses, the shift register is storing ________.
Options
A. 1101
B. 0111
C. 0001
D. 1110

6. A bidirectional 4-bit shift register is storing the nibble 1110. Its input is LOW. The nibble 0111 is waiting to be entered on the serial data-input line. After two clock pulses, the shift register is storing ________.
Options
A. 1110
B. 0111
C. 1000
D. 1001

7. The bit sequence 0010 is serially entered (right-most bit first) into a 4-bit parallel out shift register that is initially clear. What are the Q outputs after two clock pulses?
Options
A. 0000
B. 0010
C. 1000
D. 1111

10. How would a latch circuit be used in a microprocessor system?
Options
A. as transportation for Intel employees
B. for a group of data that is the same
C. as a set of common connections for transfer of data

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