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- Question
Which of the following gates is described by the expression
?
Options- A. OR
- B. AND
- C. NOR
- D. NAND
- Correct Answer
- NAND
- 1. What does the small bubble on the output of the NAND gate logic symbol mean?
Options- A. open collector output
- B. tristate
- C. The output is inverted.
- D. none of the above Discuss
- 2. A device used to display one or more digital signals so that they can be compared to expected timing diagrams for the signals is a:
Options- A. DMM
- B. spectrum analyzer
- C. logic analyzer
- D. frequency counter Discuss
- 3. Which of the following choices meets the minimum requirement needed to create specialized waveforms that are used in digital control and sequencing circuits?
Options- A. basic gates, a clock oscillator, and a repetitive waveform generator
- B. basic gates, a clock oscillator, and a Johnson shift counter
- C. basic gates, a clock oscillator, and a DeMorgan pulse generator
- D. basic gates, a clock oscillator, a repetitive waveform generator, and a Johnson shift counter Discuss
- 4. CMOS IC packages are available in ________.
Options- A. DIP configuration
- B. SOIC configuration
- C. DIP and SOIC configurations
- D. neither DIP nor SOIC configurations Discuss
- 5. One advantage TTL has over CMOS is that TTL is ________.
Options- A. less expensive
- B. not sensitive to electrostatic discharge
- C. faster
- D. more widely available Discuss
- 6. The logic gate that will have HIGH or "1" at its output when any one (or more) of its inputs is HIGH is a(n):
Options- A. OR gate
- B. AND gate
- C. NOR gate
- D. NOT operation Discuss
- 7. How many entries would a truth table for a four-input NAND gate have?
Options- A. 2
- B. 8
- C. 16
- D. 32 Discuss
- 8. If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the output is HIGH, the gate is a(n):
Options- A. AND
- B. NAND
- C. NOR
- D. OR Discuss
- 9. The output of a NAND gate is LOW if ________.
Options- A. all inputs are LOW
- B. all inputs are HIGH
- C. any input is LOW
- D. any input is HIGH Discuss
- 10. Output will be a LOW for any case when one or more inputs are zero for a(n):
Options- A. OR gate
- B. NOT gate
- C. AND gate
- D. NOR gate Discuss
Logic Gates problems
Search Results
Correct Answer: The output is inverted.
Correct Answer: logic analyzer
Correct Answer: basic gates, a clock oscillator, and a repetitive waveform generator
Correct Answer: DIP and SOIC configurations
Correct Answer: not sensitive to electrostatic discharge
Correct Answer: OR gate
Correct Answer: 16
Correct Answer: NAND
Correct Answer: all inputs are HIGH
Correct Answer: AND gate
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