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Integrated-Circuit Logic Families
A major drawback in using ECL logic circuits in conjunction with TTL and MOS circuits is its negative supply voltages and logic levels.
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Integrated-Circuit Logic Families
Integrated injection logic offers high component density and is easier to fabricate than TTL.
The noise immunity of a logic circuit refers to the circuit's ability to tolerate noise by causing spurious charges in the output voltage.
A current-sourcing transistor may also be referred to as a pull-down transistor.
An unused input of a NAND gate can be left unconnected, pulled high by a pull-up resistor and tied together with another input and not change the logic output.
The major advantage of CMOS logic circuits over TTL is very low power consumption.
The abbreviated designator for a HIGH input voltage is VIH.
CMOS stands for "complementary metal-oxide semiconductors" and the FETs are normally enhancement mode devices.
The TTL HIGH level source current is higher than the LOW level sinking current.
Usually P-MOS and N-MOS circuits are identical with the exception of the voltage polarities.
The time it takes for a square wave to go from 10% to 90% of its voltage level is called propagation delay.
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