Curioustab
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Home
»
Digital Electronics
»
Counters
An asynchronous 4-bit binary down counter changes from count 2 to count 3. How many transitional states are required?
None
One
Two
Fifteen
Correct Answer:
Fifteen
← Previous Question
Next Question→
More Questions from
Counters
Synchronous counters eliminate the delay problems encountered with asynchronous counters because the:
In an HDL ring counter, many invalid states are included in the programming by:
List which pins need to be connected together on a 7493 to make a MOD-12 counter.
A 5-bit asynchronous binary counter is made up of five flip-flops, each with a 12 ns propagation delay. The total propagation delay (tp(tot)) is ________.
Integrated-circuit counter chips are used in numerous applications including:
Which of the following is an invalid state in an 8421 BCD counter?
A counter with a modulus of 16 acts as a ________.
Four cascaded modulus-10 counters have an overall modulus of ________.
Using four cascaded counters with a total of 16 bits, how many states must be deleted to achieve a modulus of 50,000?
What type of device is shown below?
Discussion & Comments
No comments yet. Be the first to comment!
Name:
Comment:
Post Comment
Join Discussion
Discussion & Comments