Difficulty: Easy
Correct Answer: Correct
Explanation:
Introduction / Context:
Choosing a logic family often starts with power, speed, and noise margin. Complementary MOS (CMOS) logic became dominant in modern electronics largely because of its very low static power, in contrast to TTL’s continuous bias currents. This question probes the broad, widely taught comparison between these families.
Given Data / Assumptions:
Concept / Approach:
CMOS uses complementary pull-up/pull-down transistors with negligible DC current when inputs are at valid logic levels and outputs are not transitioning. Hence static power is near zero, rising mainly with switching due to charging/discharging capacitances (P_dynamic ≈ C_load * V^2 * f). TTL, based on bipolar transistors, draws significant DC bias current even when idle. Therefore, on average, CMOS consumes far less power, especially at low to moderate frequencies and light loads.
Step-by-Step Solution:
Verification / Alternative check:
Datasheets exhibit quiescent current I_CC on the order of microamps for 74HC/74HCT gates versus milliamps for 74LS/74ALS gates, confirming the power advantage of CMOS at rest and typical switching rates.
Why Other Options Are Wrong:
Common Pitfalls:
Assuming CMOS always wins at any frequency and voltage; at extremely high speeds or very low voltages the comparison can be nuanced, but the general statement remains true for mainstream use.
Final Answer:
Correct
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