Difficulty: Easy
Correct Answer: Correct
Explanation:
Introduction / Context:
Binary-weighted DACs implement digital-to-analog conversion by summing scaled contributions from each bit. The most significant bit contributes half of full-scale, the next contributes one-quarter, and so on, requiring precise weighting in the hardware network.
Given Data / Assumptions:
Concept / Approach:
For a resistor-summing implementation, smaller resistance corresponds to larger contribution (higher conductance). Thus, resistor values are selected so conductance is proportional to the bit weight. Alternatively, current-steering versions use binary-weighted current sources. The common theme is binary proportionality to implement the sum.
Step-by-Step Solution:
Verification / Alternative check:
Simulate a ramp across all codes; verify monotonic steps and correct full-scale output based on resistor ratios.
Why Other Options Are Wrong:
“Incorrect” contradicts the fundamental structure of binary-weighted DACs. “Only true for R-2R” is wrong—the R-2R ladder is a different approach that avoids wide resistor spreads. “Valid only with current sources” ignores resistor-summing implementations.
Common Pitfalls:
Large resistor ratio spreads limit resolution; switch on-resistance and parasitics disturb exact weights; temperature coefficients degrade linearity.
Final Answer:
Correct
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