Difficulty: Easy
Correct Answer: Parallel
Explanation:
Introduction / Context:
Digital systems move data either serially (one bit at a time) or in parallel (multiple bits simultaneously on multiple lines). Selecting a method involves trade-offs among speed, pin count, cable complexity, and signal integrity.
Given Data / Assumptions:
Concept / Approach:
Under the same clock, a k-bit-wide parallel bus can transfer k bits per clock, whereas a single-lane serial link transfers 1 bit per clock (without serialization techniques like higher line rate, encoding, or multiple lanes). Thus, raw throughput favors parallel when width is available.
Step-by-Step Solution:
Verification / Alternative check:
Classic microprocessor buses (8-bit, 16-bit, 32-bit) illustrate higher data per cycle than traditional UART serial links at the same fundamental clock. Modern high-speed serial compensates with much higher line rates, but the question holds “under the same clock conditions.”
Why Other Options Are Wrong:
Common Pitfalls:
Confusing practical implementations (PCIe high-speed serial) with the conceptual throughput per clock. The principle here is width versus lane rate.
Final Answer:
Parallel
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