Phase-locked loop architecture: A classical analog PLL is composed of which three fundamental subcircuits?

Introduction:
A phase-locked loop (PLL) synchronizes an internal oscillator to an external reference in phase and frequency. Recognizing its core blocks is crucial for understanding acquisition, tracking, and noise performance in communication and control systems.

Given Data / Assumptions:

• Classical, linear PLL model.
• Phase detector (phase comparator), loop filter, and voltage-controlled oscillator (VCO).
• Continuous-time implementation with standard low-pass loop filter.

Concept / Approach:
The phase comparator multiplies or otherwise compares phases to produce an error proportional to phase difference. The low-pass loop filter removes high-frequency components (sum terms) and shapes loop dynamics. The VCO converts the filtered error voltage into a frequency/phase adjustment, closing the feedback loop.

Step-by-Step Solution:

Verification / Alternative check:
Linearized small-signal loop models show a type-1 or type-2 control loop where the low-pass filter contributes poles/zeros for desired phase margin. Simulations confirm that replacing the low-pass with a bandpass prevents DC error correction, breaking lock behavior.

Why Other Options Are Wrong:

• Phase comparator, comparator, and VCO: Redundant and missing the essential loop filter.
• Phase comparator with bandpass: A bandpass would reject DC error needed for correction.
• Demodulator: Not a core PLL block (though PLLs can be used for FM demodulation).

Common Pitfalls:
Confusing frequency discriminators with phase detectors; assuming any filter topology suffices—PLL needs low-pass characteristics for DC error propagation and stability; overlooking VCO gain (Kvco) and detector gain (Kd) impact on loop design.

Final Answer:
Phase comparator, low-pass filter, and VCO.