Reading logic symbols — NAND output bubble On a NAND gate symbol, what does the small bubble at the output explicitly indicate about the output signal?

Introduction / Context:
Schematic symbols carry meaning beyond pin placement. The small bubble (often called an inversion bubble) communicates active-LOW behavior or inversion at that node. Correctly interpreting this symbol prevents wiring mistakes in mixed-polarity designs.

Given Data / Assumptions:

• Standard ANSI/IEC logic symbols are in use.
• A bubble on a gate output denotes logical inversion of that node.
• NAND is the inversion of AND.

Concept / Approach:
The NAND function is X = NOT(A * B). The symbol for a NAND gate is typically an AND gate shape with a bubble on the output, visually indicating the output is the complement of the internal AND function. Bubbles on inputs/outputs consistently denote inversion in logic symbols.

Step-by-Step Reasoning:
Identify the base shape: AND gate.Notice the output bubble: this adds a NOT to the output node.Hence the overall function is NAND, confirming that the bubble conveys inversion.

Verification / Alternative check:
Compare symbols: An AND gate without a bubble outputs A * B; adding a bubble makes it NOT(A * B). Similarly, an OR gate with an output bubble is a NOR gate (NOT(A + B)). The symbol convention is consistent across logic families.

Why Other Options Are Wrong:

• Open collector is indicated in datasheets or by specific annotations, not by an inversion bubble.
• Tristate outputs are usually shown with an additional control input and sometimes special symbol markers; a bubble alone does not denote tristate.
• “none of the above” is incorrect because the bubble clearly denotes inversion.

Common Pitfalls:

• Mistaking inversion bubbles for polarity dots of analog symbols; in digital logic they have a strict NOT meaning.
• Ignoring that bubbles on inputs imply active-LOW enable signals.

Final Answer:
The output is inverted.