2's-complement subtraction refresher: To subtract a signed subtrahend from a signed minuend using the 2's-complement method, the minuend is ________.

Introduction / Context:
The 2's-complement method converts subtraction into addition, which hardware adders perform efficiently. Knowing which operand to complement is crucial to avoid sign errors and overflow confusion.

Given Data / Assumptions:

• We are subtracting: result = minuend − subtrahend.
• Operands are in 2's-complement form with equal bit width.
• Standard adder with carry-in as needed.

Concept / Approach:
In 2's-complement arithmetic, subtraction A − B is implemented as A + (2's complement of B). That is, complement and add one to the subtrahend, not the minuend. The adder adds the minuend unchanged to the complemented subtrahend.

Step-by-Step Solution:

Verification / Alternative check:
Try A = 5, B = 3 (8-bit). 3 → 00000011; B' = 11111101 + 1 = 11111110? (careful) Correctly: ~00000011 = 11111100; +1 → 11111101 (−3). Then 00000101 + 11111101 = 00000010 with carry out discarded → 2, as expected.

Why Other Options Are Wrong:

• Complementing the minuend (always or conditionally) is incorrect; you would compute the wrong value.
• Overflow anticipation does not dictate which operand to complement; the rule is fixed: complement the subtrahend.

Common Pitfalls:
Complementing the wrong operand; mixing up 1's vs 2's complement; forgetting to ensure equal bit widths; misinterpreting the carry-out as overflow for signed results.

Final Answer:
never complemented