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Standard Logic Devices (SLD) problems


  • 1. PMOS and NMOS ____________________________.

  • Options
  • A. represent MOSFET devices utilizing either P-channel or N-channel devices exclusively within a given gate
  • B. are enhancement type CMOS devices used to produce a series of high-speed logic known as 74HC
  • C. represent positive and negative MOS type devices that can be operated from differential power supplies and are compatible with operational amplifiers
  • D. none of the above
  • Discuss
  • 2. The number of inputs that a gate output can drive without possible logic errors is the _______.

  • Options
  • A. propagation delay
  • B. noise margin
  • C. speed-power product
  • D. fanout
  • Discuss
  • 3. When the output of a standard TTL gate is HIGH, it can ___________________.

  • Options
  • A. sink 16 mA of current from the attached input gates
  • B. source 400 µA of current to no more than 10 attached gates
  • C. source 16 mA of current to no more than 10 attached gates
  • D. sink a maximum of 400 µA from no more than 10 load gates
  • Discuss
  • 4. Totem pole outputs _________ be connected __________ because ____________.

  • Options
  • A. can, in parallel, sometimes higher current is required
  • B. cannot, together, if the outputs are in opposite states excessively high currents can damage one or both devices
  • C. should, in series, certain applications may require higher output voltage
  • D. can, together, together they can handle larger load currents and higher output voltages
  • Discuss
  • 5. An open collector output can ________ current, but it cannot ___________________.

  • Options
  • A. sink, source current
  • B. source, sink current
  • C. sink, source voltage
  • D. source, sink voltage
  • Discuss

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