In computer architecture, which statement correctly describes the function of the Program Counter (PC) within a processor's control flow?

Introduction / Context:
The Program Counter (also known as the Instruction Pointer in some architectures) is a core register that drives instruction sequencing. Without a correct PC, the CPU cannot fetch the right instruction stream, leading to crashes or undefined behavior. Understanding the PC clarifies how branching, function calls, and interrupts alter control flow at the hardware level.

Given Data / Assumptions:

• Von Neumann and Harvard-like architectures use a control register to track instruction addresses.
• The PC is updated after each fetch or modified by control transfer instructions.
• The arithmetic logic unit (ALU) is a separate component from the PC.

Concept / Approach:

The PC holds the address of the next instruction to fetch. In simple pipelines, the PC increments by instruction width after each fetch; on branches, jumps, calls, or returns, the PC is loaded with a new target address. On interrupts/exceptions, hardware saves the current PC and loads a handler address. Debuggers display and manipulate the PC to control program execution at the machine level.

Step-by-Step Solution:

Verification / Alternative check:

Architecture manuals (x86 RIP, ARM PC) and basic computer organization texts confirm that the PC directs fetching from instruction memory.

Why Other Options Are Wrong:

Scheduling decisions belong to the OS, not the PC.

Counting instructions is a performance counter function, not the PC’s role.

Arithmetic occurs in the ALU, not the PC.

Common Pitfalls:

Confusing the PC with stack pointers or frame pointers; each serves distinct purposes in execution and memory management.

Final Answer:

It contains the address of the next instruction to be fetched and executed