Difficulty: Easy
Correct Answer: 32
Explanation:
Introduction / Context:
The 8051 implements four banks of eight registers each, mapped in the lower internal RAM. Understanding the total number of GPRs (across banks) versus the simultaneously active set (one bank) is key for low-level programming and context switching.
Given Data / Assumptions:
Concept / Approach:
Total defined GPRs = number of banks * registers per bank = 4 * 8 = 32. Although only 8 are actively addressed at once, all 32 physically exist in internal RAM (addresses 00h–1Fh).
Step-by-Step Solution:
Verification / Alternative check:
Memory map shows 00h–1Fh allocated to register banks: 32 bytes total.
Why Other Options Are Wrong:
Common Pitfalls:
Confusing the total implemented registers with the concurrently accessible bank; the PSW selects which set responds to Rn opcodes.
Final Answer:
32
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