Difficulty: Easy
Correct Answer: Correct
Explanation:
Introduction / Context:
Many real circuits use resistor dividers to derive reference or bias voltages. The moment a load is attached to a divider output, the circuit becomes a series–parallel network: the lower divider resistor is effectively in parallel with the load. Recognizing this is essential for predicting output sag and source current changes.
Given Data / Assumptions:
Concept / Approach:
With a load present, the bottom leg and R_L form a parallel combination. The output voltage becomes V_out = V_in * (R_bottom || R_L) / (R_top + (R_bottom || R_L)). This is a textbook series–parallel transformation and a standard example used to introduce loading effects in basic circuit courses.
Step-by-Step Solution:
Verification / Alternative check:
Measure V_out with and without the load; the loaded case is lower, matching the series–parallel formula prediction.
Why Other Options Are Wrong:
Common Pitfalls:
Designing a divider without considering R_L, leading to excessive voltage sag or wasted current; forgetting to buffer the divider with an op-amp follower when a stiff source is required.
Final Answer:
Correct
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