LUT capacity — number of truth-table combinations In mainstream FPGA logic, a single 4-input LUT can realize how many distinct input combinations (i.e., truth-table entries) for one output?

Introduction / Context:
Look-Up Tables (LUTs) are the fundamental logic primitives in many FPGA families. A k-input LUT implements any Boolean function of k variables by storing the function’s output values in 2^k memory cells and using the k inputs as an address into that small memory. Knowing 2^k is essential for estimating resource usage and fitting designs into a given device.

Given Data / Assumptions:

• We consider a single 4-input LUT.
• Each unique input vector corresponds to one truth-table entry.
• One output bit per entry is stored in configuration memory.

Concept / Approach:

For k inputs, the number of possible input combinations equals 2^k. Therefore, a 4-input LUT has 2^4 = 16 addressable entries, each holding one output bit. By programming these 16 bits, the LUT can represent any mapping from 4 input bits to 1 output bit.

Step-by-Step Solution:

Verification / Alternative check:

Examine FPGA databooks: 4-input LUTs show a 16-bit configuration table; 6-input LUTs show 64 entries (2^6).

Why Other Options Are Wrong:

4 and 8 underestimate the address space for 4 inputs.

32 corresponds to a 5-input LUT, not a 4-input LUT.

Common Pitfalls:

Confusing the number of inputs with the number of truth-table entries; forgetting that each additional input doubles the table size.

Final Answer:

16