Combinational logic via stored tables — identify the circuit type A circuit that implements a combinational logic function by storing a complete table of output values for every possible input combination is called a:

Introduction / Context:
Modern FPGAs and some CPLDs use small memories to realize arbitrary combinational logic. These memories are programmed with the desired output for each input address. The concept is foundational for understanding how synthesis maps Boolean functions onto physical resources in programmable devices.

Given Data / Assumptions:

• A k-input combinational function has 2^k possible input combinations.
• Each combination maps to a single output bit (or bits).
• The device provides a small RAM/ROM-like element that is preloaded with these bits.

Concept / Approach:
By treating the inputs as address lines into a tiny memory and storing the desired output bit at each address, the device directly implements the truth table. This memory-based implementation is called a look-up table (LUT). LUTs are universal combinational primitives because any Boolean function of k variables can be expressed this way.

Step-by-Step Reasoning:

Verification / Alternative check:
FPGA vendor docs show LUTs implemented as SRAM bits driving a multiplexer tree. This hardware behaves identically to a precomputed truth table indexed by inputs.

Why Other Options Are Wrong:

• Output logic macrocell/logic element: broader architectural terms; the specific truth-table device is a LUT.
• Parallel logic expander: not a standard term for truth-table realization.
• Programmable counter: sequential device, not purely combinational.

Common Pitfalls:

• Confusing LUTs (combinational) with registers or block RAMs (sequential/storage).

Final Answer:
look-up table