For a binary half adder circuit with two input bits A and B, which description correctly gives its truth table and basic gate level implementation?

Introduction / Context:
The half adder is one of the simplest combinational circuits used in digital electronics. It adds two single bit binary numbers and produces a sum bit and a carry bit. Understanding its truth table and gate level implementation provides a foundation for designing full adders, ripple carry adders and more complex arithmetic logic units. This question checks your knowledge of the correct logical relationships for the half adder outputs.

Given Data / Assumptions:

The inputs are two binary digits, commonly labeled A and B.
The outputs are a sum bit S and a carry bit C.
We assume standard binary addition rules without any incoming carry bit (that would require a full adder).
The question asks for both the truth table relationship and the gate level realisation using basic logic gates.

Concept / Approach:
For a half adder, binary addition rules give four possible input combinations: 00, 01, 10 and 11. Adding these two bits produces a sum and a carry. The sum bit is 1 when exactly one of the inputs is 1, and 0 when both are the same. This is precisely the behaviour of the exclusive OR (XOR) function. The carry bit is 1 only when both inputs are 1, which is the behaviour of the AND function. Therefore, the sum output is A XOR B and the carry output is A AND B. A minimal gate level implementation uses one XOR gate and one AND gate.

Step-by-Step Solution:
Step 1: Write out the binary addition for all input combinations: A = 0, B = 0: 0 + 0 = 0, so sum = 0, carry = 0. A = 0, B = 1: 0 + 1 = 1, so sum = 1, carry = 0. A = 1, B = 0: 1 + 0 = 1, so sum = 1, carry = 0. A = 1, B = 1: 1 + 1 = binary 10, so sum = 0, carry = 1. Step 2: Observe from the truth table that the sum bit is 1 exactly when A and B are different. This is the XOR function: S = A XOR B. Step 3: Observe that the carry bit is 1 only when both inputs are 1. This is the AND function: C = A AND B. Step 4: Conclude that a gate level implementation can use one XOR gate to generate the sum and one AND gate to generate the carry.

Verification / Alternative check:
You can verify the equations by substituting all input combinations into S = A XOR B and C = A AND B. For each of the four cases, these formulas produce exactly the same outputs as the binary addition truth table listed above. Simulation tools or simple breadboard experiments with logic ICs can also be used to confirm that the XOR and AND based implementation behaves as a half adder.

Why Other Options Are Wrong:
If you swap the functions, making sum = A AND B and carry = A XOR B, the truth table no longer matches binary addition. For example, for A = 0, B = 1 the sum would be 0 instead of 1.
A sum that is always 0 and a carry that is A OR B obviously does not represent binary addition, since 0 + 1 should produce a sum of 1, not 0.
Using OR for sum and NOR for carry does not match the required truth table and would give incorrect results for multiple input combinations.

Common Pitfalls:
Students sometimes confuse the roles of XOR and OR, using A OR B for the sum output. This fails when both inputs are 1, because OR produces 1 rather than the needed sum 0 with carry 1. Another pitfall is to forget that a half adder does not include an input carry; when a carry input is required, a full adder must be used. Correctly associating XOR with sum and AND with carry is key to understanding adder design.

Final Answer:
For a half adder, the sum output is A XOR B and the carry output is A AND B, implemented with one XOR gate and one AND gate.