Self-biasing a JFET: In a self-biased JFET amplifier, which component ensures the gate-source voltage V_GS becomes negative (for an n-channel device) without a separate negative supply?

Introduction / Context:
Self-bias is a simple and robust way to bias JFET amplifiers. It avoids an extra negative supply by exploiting the voltage drop across a source resistor, which raises the source potential relative to the (near-zero) gate potential, thereby creating a negative V_GS for an n-channel JFET.

Given Data / Assumptions:

• n-channel JFET operated in the active region.
• Gate connected to ground via a large resistor (negligible gate current).
• A source resistor R_S develops a voltage due to drain-source current.

Concept / Approach:
Because gate current is approximately zero, the gate sits near 0 V through a high-value resistor. The channel current flowing through R_S creates V_S = I_D * R_S > 0. Therefore V_GS = V_G − V_S ≈ 0 − (I_D * R_S) = −I_D * R_S, which is negative without needing a dedicated negative supply. This negative V_GS self-adjusts with I_D, providing stabilizing feedback against device parameter variations.

Step-by-Step Solution:

Verification / Alternative check:
Measure V_G, V_S in a lab circuit. With I_D ≈ 2 mA and R_S = 1.5 kΩ, V_S ≈ 3 V, so V_GS ≈ −3 V, consistent with theory and device transfer curves.

Why Other Options Are Wrong:

• Voltage divider: Often used for BJTs or MOSFET gates to set a fixed bias, but alone does not guarantee negative V_GS without R_S feedback.
• Ground: Provides reference only; it does not create a bias voltage.
• Negative gate supply: Works, but contradicts the ”self-biased” requirement.

Common Pitfalls:
Omitting the source bypass capacitor analysis; bypassing R_S increases gain but reduces local feedback—trade-offs must be considered.

Final Answer:
source resistor