Difficulty: Easy
Correct Answer: is always zero
Explanation:
Introduction / Context:
Full-wave AC voltage regulators using antiparallel SCRs control the RMS voltage applied to a resistive load by delaying turn-on within each half cycle. For resistive loads, current is in phase with voltage and reverses direction every half cycle, which determines the average current value over a full period.
Given Data / Assumptions:
Concept / Approach:
Average (DC) current is the time-average of instantaneous current over a full cycle. With a resistive load on an AC source, instantaneous current i(t) = v(t)/R follows the polarity of v(t). Positive and negative half cycles are equal in magnitude and opposite in sign, so the net average over a full cycle is zero regardless of firing angle (provided conduction occurs symmetrically in both halves).
Step-by-Step Solution:
Verification / Alternative check:
Even with phase control, provided both halves are triggered equally, the symmetry ensures zero DC component; only the RMS value changes.
Why Other Options Are Wrong:
Common Pitfalls:
Confusing average (DC) with RMS; a regulator changes RMS value but not the fact that the average over a full cycle is zero for resistive AC loads.
Final Answer:
is always zero
Discussion & Comments