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- Question
In the keypad encoder, the ________ must hold in its current state until a key is released.
Options- A. ring counter
- B. MOD-6 counter
- C. BCD counter
- D. freeze bit
- Correct Answer
- ring counter
- 1. The full-step sequence of a stepper motor always has two coils energized in any state of the sequence and typically causes ________ of shaft rotation per step.
Options- A. 5°
- B. 10°
- C. 15°
- D. 20° Discuss
- 2. When coming up with a strategy for dividing the overall project into manageable-size pieces one must ________.
Options- A. name each input and output
- B. fully understand how the device should operate
- C. define successful completion of the project
- D. know the nature of all the signals that interconnect all the pieces Discuss
- 3. A frequency counter ________ a signal.
Options- A. measures
- B. displays
- C. measures and displays
- D. measures, displays, and generates Discuss
- 4. In a real project, the first step of definition often involves some ________ on the part of the project manager.
Options- A. time
- B. skill
- C. research
- D. management Discuss
- 5. In the digital clock project, a 60 pps input is transformed into a 1 pps timing signal. The block is called ________.
Options- A. a BCD counter
- B. a MOD-60 counter
- C. frequency divider
- D. frequency prescaling Discuss
- 6. In the frequency counter, the length of time for the ________ to be enabled can be selected with the range select input.
Options- A. display register
- B. frequency prescaler
- C. BCD counter
- D. signal generator Discuss
- 7. The stepper motor HDL will ignore its counter inputs and pass control inputs directly to the output when set in mode ________.
Options- A. 1
- B. 2
- C. 3
- D. 4 Discuss
- 8. The major blocks of the frequency counter are the counter, ________, decoder/display, and the timing and control unit.
Options- A. signal prescaler
- B. control inputs
- C. signal generator
- D. display register Discuss
- 9. In the digital clock project HDL code, the MOD-12 counter is using ________.
Options- A. a BCD counter followed by a MOD-2 counter
- B. a single HDL module
- C. a MOD-6 counter followed by a MOD-2 counter
- D. a MOD-12 counter followed by a D flip-flop Discuss
- 10. In the digital clock project, when it is 11:59:59, AND gate 1 detects that the tens of hours is 1 and the enable input is active. On the next clock pulse the AM/PM flip-flop will ________.
Options- A. set
- B. reset
- C. toggle
- D. clear Discuss
Digital System Projects Using HDL problems
Search Results
Correct Answer: 15°
Correct Answer: know the nature of all the signals that interconnect all the pieces
Correct Answer: measures and displays
Correct Answer: research
Correct Answer: frequency prescaling
Correct Answer: BCD counter
Correct Answer: 1
Correct Answer: display register
Correct Answer: a single HDL module
Correct Answer: toggle
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