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Digital Electronics
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Integrated-Circuit Logic Families
Comments
Question
________ output levels would
not
be a valid LOW for a TTL gate.
Options
A. 0.2 V
B. 0.3 V
C. 0.5 V
D. All of the above.
Correct Answer
All of the above.
Integrated-Circuit Logic Families problems
Search Results
1. Several manufacturers have developed logic that combines the best features of TTL and CMOS. This is called ________.
Options
A. 1
2
L
B. BiCMOS
C. 74ACT
D. 74HCT
Show Answer
Scratch Pad
Discuss
Correct Answer: BiCMOS
2. The lower transistor of a totem-pole output is saturated when the gate output is ________.
Options
A. overdriven
B. HIGH
C. LOW
D. malfunctioning
Show Answer
Scratch Pad
Discuss
Correct Answer: LOW
3. A logic probe is placed on the input of a digital circuit and the probe lamp blinks slowly, indicating ________.
Options
A. that an open or bad logic level exists
B. a high level output
C. a high-frequency pulse train
D. that the supply voltage is low
Show Answer
Scratch Pad
Discuss
Correct Answer: a high-frequency pulse train
4. Totem-pole outputs ________ be connected ________ because ________.
Options
A. can, in parallel, sometimes higher output current is required
B. cannot, together, if the outputs are in opposite states excessively high currents can damage one or both of the devices
C. should, in series, certain applications may require higher output voltage
D. can, together, together they can handle larger load currents and higher output voltages
Show Answer
Scratch Pad
Discuss
Correct Answer: cannot, together, if the outputs are in opposite states excessively high currents can damage one or both of the devices
5. When the output of a standard TTL gate is HIGH, it can ________.
Options
A. sink 16 mA of current from the attached input gates
B. source 400 µA of current to no more than 10 attached gates
C. source 16 mA of current to no more than 10 attached gates
D. sink a maximum of 400 µA from no more than 10 load gates
Show Answer
Scratch Pad
Discuss
Correct Answer: source 400 µA of current to no more than 10 attached gates
6. The output stage of a TTL gate is a special design called ________.
Options
A. multiemitter
B. totem-pole
C. MSI
D. DIP
Show Answer
Scratch Pad
Discuss
Correct Answer: totem-pole
7. When
V
GS
= 0 on an N-channel MOSFET switch, there is no ________ between the source and the drain.
Options
A. voltage drop
B. conductive channel
C. capacitance
D. inductance
Show Answer
Scratch Pad
Discuss
Correct Answer: conductive channel
8. The proliferation of small handheld consumer equipment such as digital video cameras, cellular phones, handheld computers (________), portable audio systems, and other devices has created a need for logic circuits in very small packages.
Options
A. HDLs
B. GDAs
C. PDAs
D. TTLs
Show Answer
Scratch Pad
Discuss
Correct Answer: PDAs
9. Fan-out for a typical TTL gate is ________.
Options
A. 100
B. 54
C. 10
D. 4
Show Answer
Scratch Pad
Discuss
Correct Answer: 10
10. The time it takes for an input signal to pass through internal circuitry and generate the appropriate output effect is known as ________.
Options
A. fan-out
B. propagation delay
C. rise time
D. fall time
Show Answer
Scratch Pad
Discuss
Correct Answer: propagation delay
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