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- Question
A logic probe is placed on the input of a digital circuit and the probe lamp blinks slowly, indicating ________.
Options- A. that an open or bad logic level exists
- B. a high level output
- C. a high-frequency pulse train
- D. that the supply voltage is low
- Correct Answer
- a high-frequency pulse train
- 1. Totem-pole outputs ________ be connected ________ because ________.
Options- A. can, in parallel, sometimes higher output current is required
- B. cannot, together, if the outputs are in opposite states excessively high currents can damage one or both of the devices
- C. should, in series, certain applications may require higher output voltage
- D. can, together, together they can handle larger load currents and higher output voltages Discuss
- 2. When the output of a standard TTL gate is HIGH, it can ________.
Options- A. sink 16 mA of current from the attached input gates
- B. source 400 µA of current to no more than 10 attached gates
- C. source 16 mA of current to no more than 10 attached gates
- D. sink a maximum of 400 µA from no more than 10 load gates Discuss
- 3. One advantage that MOSFET transistors have over bipolar transistors is ________.
Options- A. high input impedance
- B. higher switching speed
- C. low input impedance
- D. reduced propagation delay Discuss
- 4. ________ TTL allows three possible output states.
Options- A. Triswitch
- B. Triinput
- C. Tristate
- D. Trident Discuss
- 5. The 74F-Fast TTL integrated-circuit fabrication technique uses reduced interdevice ________ to achieve reduced propagation delays.
Options- A. noise
- B. resistance
- C. capacitance
- D. inductance Discuss
- 6. The lower transistor of a totem-pole output is saturated when the gate output is ________.
Options- A. overdriven
- B. HIGH
- C. LOW
- D. malfunctioning Discuss
- 7. Several manufacturers have developed logic that combines the best features of TTL and CMOS. This is called ________.
Options- A. 12L
- B. BiCMOS
- C. 74ACT
- D. 74HCT Discuss
- 8. ________ output levels would not be a valid LOW for a TTL gate.
Options- A. 0.2 V
- B. 0.3 V
- C. 0.5 V
- D. All of the above. Discuss
- 9. The output stage of a TTL gate is a special design called ________.
Options- A. multiemitter
- B. totem-pole
- C. MSI
- D. DIP Discuss
- 10. When VGS = 0 on an N-channel MOSFET switch, there is no ________ between the source and the drain.
Options- A. voltage drop
- B. conductive channel
- C. capacitance
- D. inductance Discuss
Integrated-Circuit Logic Families problems
Search Results
Correct Answer: cannot, together, if the outputs are in opposite states excessively high currents can damage one or both of the devices
Correct Answer: source 400 µA of current to no more than 10 attached gates
Correct Answer: high input impedance
Correct Answer: Tristate
Correct Answer: capacitance
Correct Answer: LOW
Correct Answer: BiCMOS
Correct Answer: All of the above.
Correct Answer: totem-pole
Correct Answer: conductive channel
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