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Digital Electronics
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Integrated-Circuit Logic Families
See What Others Are Saying!
Question
A logic probe is placed on the output of a digital circuit and the probe lamp is dimly lit. This display indicates ________.
Options
A. that an open or bad logic level exists
B. a high level output
C. a high-frequency pulse train
D. that the supply voltage is low
Correct Answer
that an open or bad logic level exists
More questions
1. The duty cycle of a square wave is ________.
Options
A. 10%
B. 25%
C. 50%
D. 100%
Show Answer
Scratch Pad
Discuss
Correct Answer: 50%
2. The VHDL editor provided with a schematic editor development system will produce a file with the extension .vhd, which can be used by the simulator to test the output of the logic design.
Options
A. True
B. False
Show Answer
Scratch Pad
Discuss
Correct Answer: True
3. An ADC that uses an up/down counter (and other devices) to follow changes in the input analog signal is a ________.
Options
A. single-slope ramp converter
B. dual-slope ramp converter
C. successive-approximation converter
D. tracking converter
Show Answer
Scratch Pad
Discuss
Correct Answer: tracking converter
4. The logic gate that will have a LOW output when any one of its inputs is HIGH is the:
Options
A. NAND gate
B. AND gate
C. NOR gate
D. OR gate
Show Answer
Scratch Pad
Discuss
Correct Answer: NOR gate
5. Each "1" entry in a K-map square represents:
Options
A. a HIGH for each input truth table condition that produces a HIGH output.
B. a HIGH output on the truth table for all LOW input combinations.
C. a LOW output for all possible HIGH input conditions.
D. a DON'T CARE condition for all possible input truth table combinations.
Show Answer
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Discuss
Correct Answer: a HIGH for each input truth table condition that produces a HIGH output.
6. For a multistage counter to be truly synchronous, the ________ of each stage must be connected to ________.
Options
A.
C
p
, the same clock input line
B.
CE
, the same clock input line
C.
, the terminal count output
D.
, both clock input lines
Show Answer
Scratch Pad
Discuss
Correct Answer:
C
p
, the same clock input line
7. The ________ circuit produces a HIGH output whenever the two inputs are unequal.
Options
A. exclusive-AND
B. exclusive-NOR
C. exclusive-OR
D. inexclusive-OR
Show Answer
Scratch Pad
Discuss
Correct Answer: exclusive-OR
8. A Karnaugh map will ________.
Options
A. eliminate the need for tedious Boolean simplifications
B. allow any circuit to be implemented with just AND and OR gates
C. produce the simplest sum-of-products expression
D. give an overall picture of how the signals flow through the logic circuit
Show Answer
Scratch Pad
Discuss
Correct Answer: eliminate the need for tedious Boolean simplifications
9. A 4-bit adder has the following inputs: C
0
= 0, A
1
= 0, A
2
= 1, A
3
= 0, A
4
= 1, B
1
= 0, B
2
= 1, B
3
= 1, B
4
= 1. The output will be ________.
Options
A. 01100
B. 10101
C. 11000
D. 00011
Show Answer
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Discuss
Correct Answer: 11000
10. How can a digital one-shot be implemented using HDL?
Options
A. By using a resistor and a capacitor
B. By applying the concept of a counter
C. By using a library function
D. By applying a level trigger
Show Answer
Scratch Pad
Discuss
Correct Answer: By applying the concept of a counter
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