CuriousTab
Search
CuriousTab
Home
Aptitude
Computer
C Programming
C# Programming
C++ Programming
Database
Java Programming
Networking
Engineering
Biochemical Engineering
Biochemistry
Biotechnology
Chemical Engineering
Civil Engineering
Computer Science
Digital Electronics
Electrical Engineering
Electronics
Electronics and Communication Engineering
Mechanical Engineering
Microbiology
Technical Drawing
GK
Current Affairs
General Knowledge
Reasoning
Data Interpretation
Logical Reasoning
Non Verbal Reasoning
Verbal Ability
Verbal Reasoning
Exams
AIEEE
Bank Exams
CAT
GATE
IIT JEE
TOEFL
Jobs
Analyst
Bank PO
Database Administrator
IT Trainer
Network Engineer
Project Manager
Software Architect
Discussion
Home
‣
Digital Electronics
‣
Programmable Logic Device
Comments
Question
An Altera FLEX10K device uses a(n) ________ architecture.
Options
A. OR array
B. AND array
C. OR and AND array
D. look-up table
Correct Answer
look-up table
Programmable Logic Device problems
Search Results
1. Four subcategories of ASIC devices are available to create digital systems. These are PLDs, gate arrays, standard cells, and ________.
Options
A. HCPLDs
B. full custom
C. GAL
D. FPLDs
Show Answer
Scratch Pad
Discuss
Correct Answer: full custom
2. The SPLD classification includes the ________ PLD devices.
Options
A. earliest
B. smallest
C. largest
D. newest
Show Answer
Scratch Pad
Discuss
Correct Answer: earliest
3. In a MAX7000S device, when an I/O pin is configured as an input, the associated macrocell can be used for ________.
Options
A. buried logic
B. another output
C. extra speed
D. in-system testing
Show Answer
Scratch Pad
Discuss
Correct Answer: buried logic
4. The ________ is the most popular standard logic device family today.
Options
A. TTL
B. CMOS
C. ECL
D. None of the above
Show Answer
Scratch Pad
Discuss
Correct Answer: CMOS
5. The EPM 7128S is a(n) ________ device.
Options
A. PLD
B. JTAG
C. EEPROM
D. ISP
Show Answer
Scratch Pad
Discuss
Correct Answer: ISP
6. Interfacing (74HCMOS to 74ALSTTl or 74TTL to 74LSTTL) can be done with no danger.
Options
A. True
B. False
Show Answer
Scratch Pad
Discuss
Correct Answer: False
7. The AND is the simplest of the gates, requiring the least amount of circuitry to implement in TTL.
Options
A. True
B. False
Show Answer
Scratch Pad
Discuss
Correct Answer: False
8. Propagation delay in TTL is due to slow switching speeds.
Options
A. True
B. False
Show Answer
Scratch Pad
Discuss
Correct Answer: False
9. A pulse is not perfectly square; it takes time for the digital level to rise from 0 up to 1 and to fall from 1 down to 0.
Options
A. True
B. False
Show Answer
Scratch Pad
Discuss
Correct Answer: True
10. In TTL the noise margin is between 0.8 V and 0.4 V.
Options
A. True
B. False
Show Answer
Scratch Pad
Discuss
Correct Answer: True
Comments
There are no comments.
Enter a new Comment
Save
More in Digital Electronics:
Boolean Algebra and Logic Simplification
Code Converters and Multiplexers
Combinational Logic Analysis
Combinational Logic Circuits
Computers
Counters
Describing Logic Circuits
Digital Arithmetic Operations and Circuits
Digital Concepts
Digital Design
Digital Signal Processing
Digital System Projects Using HDL
Ex-OR and Ex-NOR Gates
Flip-Flops
Integrated-Circuit Logic Families
Integrated Circuit Technologies
Interfacing to the Analog World
Logic Families and Their Characteristics
Logic Gates
Memory and Storage
Microprocessor Fundamentals
MSI Logic Circuits
Multivibrators and 555 Timer
Number Systems and Codes
Programmable Logic Device
Shift Registers
Signals and Switches
The 8051 Microcontroller