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  • Question
  • An Altera FLEX10K device uses a(n) ________ architecture.


  • Options
  • A. OR array
  • B. AND array
  • C. OR and AND array
  • D. look-up table

  • Correct Answer
  • look-up table 


  • Programmable Logic Device problems


    Search Results


    • 1. Four subcategories of ASIC devices are available to create digital systems. These are PLDs, gate arrays, standard cells, and ________.

    • Options
    • A. HCPLDs
    • B. full custom
    • C. GAL
    • D. FPLDs
    • Discuss
    • 2. The SPLD classification includes the ________ PLD devices.

    • Options
    • A. earliest
    • B. smallest
    • C. largest
    • D. newest
    • Discuss
    • 3. In a MAX7000S device, when an I/O pin is configured as an input, the associated macrocell can be used for ________.

    • Options
    • A. buried logic
    • B. another output
    • C. extra speed
    • D. in-system testing
    • Discuss
    • 4. The ________ is the most popular standard logic device family today.

    • Options
    • A. TTL
    • B. CMOS
    • C. ECL
    • D. None of the above
    • Discuss
    • 5. The EPM 7128S is a(n) ________ device.

    • Options
    • A. PLD
    • B. JTAG
    • C. EEPROM
    • D. ISP
    • Discuss
    • 6. Interfacing (74HCMOS to 74ALSTTl or 74TTL to 74LSTTL) can be done with no danger.

    • Options
    • A. True
    • B. False
    • Discuss
    • 7. The AND is the simplest of the gates, requiring the least amount of circuitry to implement in TTL.

    • Options
    • A. True
    • B. False
    • Discuss
    • 8. Propagation delay in TTL is due to slow switching speeds.

    • Options
    • A. True
    • B. False
    • Discuss
    • 9. A pulse is not perfectly square; it takes time for the digital level to rise from 0 up to 1 and to fall from 1 down to 0.

    • Options
    • A. True
    • B. False
    • Discuss
    • 10. In TTL the noise margin is between 0.8 V and 0.4 V.

    • Options
    • A. True
    • B. False
    • Discuss


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