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Home Digital Electronics Programmable Logic Device Comments

  • Question
  • Most FPGA logic modules utilize a(n) ________ approach to create the desired logic functions.


  • Options
  • A. AND array
  • B. Look-up table
  • C. OR array
  • D. AND and OR array

  • Correct Answer
  • Look-up table 


  • Programmable Logic Device problems


    Search Results


    • 1. ________ is a mature technology consisting of numerous subfamilies that have been developed over many years of use.

    • Options
    • A. TTL
    • B. CMOS
    • C. ECL
    • D. None of the above
    • Discuss
    • 2. Using a hardware solution for a digital system is always ________ than a software solution.

    • Options
    • A. slower
    • B. harder
    • C. easier
    • D. faster
    • Discuss
    • 3. The flexibility of the GAL16V8 is in its ________.

    • Options
    • A. AND/OR array
    • B. D flip-flops
    • C. programmable output logic macro cells
    • D. EEPROM
    • Discuss
    • 4. In the GAL16V8, the ________ selects the signal that is fed back into the input matrix.

    • Options
    • A. FMUX
    • B. OMUX
    • C. PTMUX
    • D. TSMUX
    • Discuss
    • 5. The final step in a design flow in which the logic design is implemented in the target device is called ________.

    • Options
    • A. design entry
    • B. simulation
    • C. downloading
    • D. compiling
    • Discuss
    • 6. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmer interconnect that is used to connect internal logic modules is called a ________.

    • Options
    • A. bed-of-nails
    • B. boundary scan
    • C. CLB
    • D. CPLD
    • Discuss
    • 7. The MAX+PLUS II compiler will automatically program a macrocell to borrow up to ________ product terms from each of the 3 adjacent macrocells in the same LAB.

    • Options
    • A. 4
    • B. 5
    • C. 6
    • D. 7
    • Discuss
    • 8. An application program in the development software package that controls the operation of the software is called a ________.

    • Options
    • A. compiler
    • B. bed-of-nails
    • C. boundary scan
    • D. primitive
    • Discuss
    • 9. The ________ can generate any possible logic function of the input variables because it generates every possible AND product term.

    • Options
    • A. GAL
    • B. SOP
    • C. PROM
    • D. LAB
    • Discuss
    • 10. The major structures in the MAX7000S are the ________ and ________.

    • Options
    • A. LUT, PIA
    • B. FMUX, LAB
    • C. LAB, PIA
    • D. LUT, FMUX
    • Discuss


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