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Home Digital Electronics Programmable Logic Device Comments

  • Question
  • An EPM 7128S in a ________ PQFP package has 12 I/O per LAB plus 4 additional input-only pins for a total of 100 pins.


  • Options
  • A. 100-pin
  • B. 120-pin
  • C. 140-pin
  • D. 160-pin

  • Correct Answer
  • 160-pin 


  • Programmable Logic Device problems


    Search Results


    • 1. In a GAL16V8, the D flip-flops contained in the OLMCs have ________ and ________.

    • Options
    • A. asynchronous reset, synchronous preset
    • B. asynchronous preset, synchronous reset
    • C. asynchronous clear, synchronous set
    • D. asynchronous set, synchronous clear
    • Discuss
    • 2. The distinction between CPLDs and FPGAs is ________.

    • Options
    • A. well known
    • B. very small
    • C. often fuzzy
    • D. very large
    • Discuss
    • 3. Gated arrays are ________ circuits that offer hundreds of thousands of gates.

    • Options
    • A. VLSI
    • B. full custom
    • C. LSI
    • D. ULSI
    • Discuss
    • 4. Most complex digital designs include ________.

    • Options
    • A. standard logic devices
    • B. ASIC devices
    • C. microprocessor/DSP devices
    • D. a mix of different hardware categories
    • Discuss
    • 5. The field programmable logic array was the first ________ programmable logic device.

    • Options
    • A. understandable
    • B. logic array
    • C. multifunction
    • D. nonmemory
    • Discuss
    • 6. Design costs for standard cell ASICs are ________ those for MPGAs.

    • Options
    • A. lower than
    • B. about the same as
    • C. higher than
    • D. none of the above
    • Discuss
    • 7. The programming technologies that are used in FPGA devices include SRAM, flash, and antifuse, with ________ being the most common.

    • Options
    • A. SRAM
    • B. flash
    • C. antifuse
    • D. SRAM and flash
    • Discuss
    • 8. FLEX10K devices are generally classified as ________.

    • Options
    • A. PLDs
    • B. FPGAs
    • C. HCPLDs
    • D. CPLDs
    • Discuss
    • 9. A macrocell is ________.

    • Options
    • A. part of a PAL or GAL
    • B. a type of one-time programmable SPLD
    • C. an example of intellectual property
    • D. a logic array block
    • Discuss
    • 10. In the MAX7000S device up to ________ signals can feed each LAB from the PIA.

    • Options
    • A. 0
    • B. 18
    • C. 36
    • D. 72
    • Discuss


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