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- Question
The programming technologies that are used in CPLD devices are all nonvolatile.
Options- A. True
- B. False
- Correct Answer
- True
- 1. The GAL22V10 has 12 outputs pins and 10 input pins.
Options- A. True
- B. False Discuss
- 2. The FPLA has a programmable AND array and a programmable OR array.
Options- A. True
- B. False Discuss
- 3. Most PAL devices have a tristate buffer driving the input pins.
Options- A. True
- B. False Discuss
- 4. In the OLMC of a GAL16V8, the FMUX selects the signal that is fed into the input matrix.
Options- A. True
- B. False Discuss
- 5. The major structures of the MAX7000S are the logic array block (LAB) and the programmable intermediate array (PIA).
Options- A. True
- B. False Discuss
- 6. A PAL uses a programmable OR array followed by a fixed AND array.
Options- A. True
- B. False Discuss
- 7. The hard core portions of FPGAs are reprogrammable in the field.
Options- A. True
- B. False Discuss
- 8. The major digital system categories include Boolean logic, ASICs, and microprocessor/DSP devices.
Options- A. True
- B. False Discuss
- 9. The Boolean expression (A + B)(C + D) is an example of ________.
Options- A. LAB
- B. LUT
- C. SOP
- D. POS Discuss
- 10. A complex programmable logic device that consists of multiple SPLD arrays with programmable interconnections is called a ________.
Options- A. bed-of-nails
- B. boundary scan
- C. CLB
- D. CPLD Discuss
Programmable Logic Device problems
Search Results
Correct Answer: False
Correct Answer: True
Correct Answer: False
Correct Answer: True
Correct Answer: False
Correct Answer: False
Correct Answer: False
Correct Answer: False
Correct Answer: POS
Correct Answer: CPLD
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