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Home ‣ Digital Electronics ‣ Programmable Logic Device Comments
  • Question

  • In the OLMC of a GAL16V8, the FMUX selects the signal that is fed into the input matrix.


  • Options
  • A. True
  • B. False

  • Correct Answer
  • True 

    • Programmable Logic Device problems

    Search Results

    • 1. The major structures of the MAX7000S are the logic array block (LAB) and the programmable intermediate array (PIA).

    • Options
    • A. True
    • B. False
      • Discuss
    • 2. Sum-of-products is two or more product terms that are NANDed together.

    • Options
    • A. True
    • B. False
      • Discuss
    • 3. LUT is an acronym for look-up table.

    • Options
    • A. True
    • B. False
      • Discuss
    • 4. All I/O pins in the MAX7000S family have a tristate buffer.

    • Options
    • A. True
    • B. False
      • Discuss
    • 5. The PAL has an AND and OR structure similar to a PROM, but in the PAL the inputs to the AND gates are programmable, whereas the inputs to the OR gate are hard-wired.

    • Options
    • A. True
    • B. False
      • Discuss
    • 6. Most PAL devices have a tristate buffer driving the input pins.

    • Options
    • A. True
    • B. False
      • Discuss
    • 7. The FPLA has a programmable AND array and a programmable OR array.

    • Options
    • A. True
    • B. False
      • Discuss
    • 8. The GAL22V10 has 12 outputs pins and 10 input pins.

    • Options
    • A. True
    • B. False
      • Discuss
    • 9. The programming technologies that are used in CPLD devices are all nonvolatile.

    • Options
    • A. True
    • B. False
      • Discuss
    • 10. A PAL uses a programmable OR array followed by a fixed AND array.

    • Options
    • A. True
    • B. False
      • Discuss

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