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Home ‣ Digital Electronics ‣ Programmable Logic Device Comments
- Question
In a PLD, a blown fuse at an OR gate is a LOW and a blown fuse at an AND gate is a HIGH.
Options- A. True
- B. False
- Correct Answer
- True
- 1. The GAL chip uses an EEPROM array that is erasable and reprogrammable at least 1000 times.
Options- A. True
- B. False Discuss
- 2. PLDs cannot meet all the possible requirements of complex digital circuitry.
Options- A. True
- B. False Discuss
- 3. The SRAM technology is volatile.
Options- A. True
- B. False Discuss
- 4. With microcomputer/DSP systems, devices can be electronically controlled and data can be manipulated by executing a program of instructions that has been written for the application.
Options- A. True
- B. False Discuss
- 5. Most complex digital designs include a mix of different hardware categories.
Options- A. True
- B. False Discuss
- 6. The schematic editor allows you to connect with predefined logic symbols.
Options- A. True
- B. False Discuss
- 7. Gate arrays are ULSI circuits that offer hundreds of thousands of gates.
Options- A. True
- B. False Discuss
- 8. The MAX+PLUS II compiler will automatically program a macrocell to borrow up to six product terms from each of three adjacent macrocells in the same LAB.
Options- A. True
- B. False Discuss
- 9. VHDL code is divided into three sections: library declaration, entity declaration, and architecture body.
Options- A. True
- B. False Discuss
- 10. The JTAG signals are named TDI, TDO, TMS, and TCK.
Options- A. True
- B. False Discuss
Programmable Logic Device problems
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