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  • Question

  • Assume a 4-bit ripple counter has a failure in the second flip-flop such that it "locks up." The third and fourth stages will ________.


  • Options
  • A. continue to count with correct outputs
  • B. continue to count but have incorrect outputs
  • C. stop counting
  • D. turn into molten silicon

  • Correct Answer
  • stop counting 

    • Counters problems

    Search Results

    • 1. Asynchronous counters are often called ________ counters.

    • Options
    • A. toggle
    • B. ripple
    • C. binary
    • D. flip-flop
      • Discuss
    • 2. Assume you want to determine the timing diagram for a 4-bit counter using an oscilloscope. The best choice for an oscilloscope trigger signal is ________.

    • Options
    • A. the most significant bit (MSB)
    • B. the least significant bit (LSB)
    • C. the clock signal
    • D. from a composite of the MSB and LSB
      • Discuss
    • 3. The technique used by one-shots to respond to an edge rather than a level is called ________.

    • Options
    • A. level management
    • B. edge triggering
    • C. trigger input
    • D. edge trapping
      • Discuss
    • 4. Many parallel counters use ________ presetting whereby the counter is preset on the active transition of the same clock signal that is used for counting.

    • Options
    • A. feedback
    • B. synchronous
    • C. ripple
    • D. asynchronous
      • Discuss
    • 5. The given circuit represents a(n) ________.


    • Options
    • A. four-bit binary counter
    • B. asynchronous BCD decade counter
    • C. synchronous BCD decade counter
    • D. BCD-to-decimal decoder
      • Discuss
    • 6. A reliable method for eliminating decoder spikes is the technique called ________.

    • Options
    • A. strobing
    • B. feeding
    • C. wagging
    • D. waving
      • Discuss
    • 7. A glitch that appears on the decoded output of a ripple counter is often difficult to see on an oscilloscope because ________.

    • Options
    • A. it is a random event
    • B. it occurs less frequently than the normal decoded output
    • C. it is very fast
    • D. all of the above
      • Discuss
    • 8. Shift-register counters use ________, which means that the output of the last FF in the register is connected back to the first FF in some way.

    • Options
    • A. MOD
    • B. feedback
    • C. strobing
    • D. switchbacks
      • Discuss
    • 9. A 4-bit binary up counter has an input clock frequency of 20 kHz. The frequency of the most significant bit is ________.

    • Options
    • A. 1.25 kHz
    • B. 2.50 kHz
    • C. 160 kHz
    • D. 320 kHz
      • Discuss
    • 10. The given circuit is a(n) ________.


    • Options
    • A. three-bit synchronous binary counter
    • B. eight-bit asynchronous binary flip-flop
    • C. two-bit asynchronous binary counter
    • D. four-bit asynchronous binary counter
      • Discuss

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