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  • Question

  • ________ is the output frequency of the counter shown below.

    ________ is the output frequency of the counter shown below. 4 MHz 20 kHz 210.5 kHz 800 Hz


  • Options
  • A. 4 MHz
  • B. 20 kHz
  • C. 210.5 kHz
  • D. 800 Hz

  • Correct Answer
  • 20 kHz 

    • Counters problems

    Search Results

    • 1. A sequential circuit design is used to ________.

    • Options
    • A. count up
    • B. count down
    • C. decode an end count
    • D. count in a random order
      • Discuss
    • 2. An asynchronous binary up counter, made from a series of leading edge-triggered flip-flops, can be changed to a down counter by ________.

    • Options
    • A. taking the output on the other side of the flip-flops ( instead of Q)
    • B. clocking of each succeeding flip-flop from the other side ( instead of Q)
    • C. changing the flip-flops to trailing edge triggering
    • D. all of the above
      • Discuss
    • 3. It is a characteristic of ring counters that the ________ equal to the number of flip-flops in the register.

    • Options
    • A. number of invalid states is
    • B. number of CASE statements is
    • C. modulus is
    • D. other states are
      • Discuss
    • 4. A(n) ________ one-shot starts a pulse in response to a trigger and will restart the internal pulse timer every time a subsequent trigger edge occurs before the pulse is complete.

    • Options
    • A. non-retriggerable
    • B. retriggerable
    • C. high-level triggered
    • D. edge-triggered
      • Discuss
    • 5. The ________ counter in the Altera library has controls that allow it to count up or down, and perform synchronous parallel load and asynchronous cascading.

    • Options
    • A. 74134
    • B. LPM
    • C. synchronous
    • D. AHDL
      • Discuss
    • 6. One method of troubleshooting involves ________ the circuit under test with a ________ or ________ and then observing the output to check for proper bit patterns.

    • Options
    • A. checking, voltmeter, ohmmeter
    • B. exercising, stimulus, test pattern
    • C. testing, scope, logic analyzer
    • D. smashing, hammer, axe
      • Discuss
    • 7. The given circuit represents a(n) ________.


    • Options
    • A. four-bit binary counter
    • B. asynchronous BCD decade counter
    • C. synchronous BCD decade counter
    • D. BCD-to-decimal decoder
      • Discuss
    • 8. Many parallel counters use ________ presetting whereby the counter is preset on the active transition of the same clock signal that is used for counting.

    • Options
    • A. feedback
    • B. synchronous
    • C. ripple
    • D. asynchronous
      • Discuss
    • 9. The technique used by one-shots to respond to an edge rather than a level is called ________.

    • Options
    • A. level management
    • B. edge triggering
    • C. trigger input
    • D. edge trapping
      • Discuss
    • 10. Assume you want to determine the timing diagram for a 4-bit counter using an oscilloscope. The best choice for an oscilloscope trigger signal is ________.

    • Options
    • A. the most significant bit (MSB)
    • B. the least significant bit (LSB)
    • C. the clock signal
    • D. from a composite of the MSB and LSB
      • Discuss

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