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  • Question

  • A J-K flip-flop is reset and must stay reset after the clock pulse. This transition requires that ________.


  • Options
  • A. J and K inputs must both = 0
  • B. J must be 0, K doesn't matter
  • C. J doesn't matter, K must = 0
  • D. J must be 0 and K must be 1

  • Correct Answer
  • J must be 0, K doesn't matter 

    • Counters problems

    Search Results

    • 1. The decimal equivalent of the largest number that can be stored in a 4-bit binary counter is ________.

    • Options
    • A. 8
    • B. 15
    • C. 16
    • D. 32
      • Discuss
    • 2. Modulus refers to ________.

    • Options
    • A. a method used to fabricate decade counter units
    • B. the modulus of elasticity, or the ability of a circuit to be stretched from one mode to another
    • C. an input on a counter that is used to set the counter state, such as UP/DOWN
    • D. the maximum number of states in a counter sequence
      • Discuss
    • 3. The circuit shown below is a ________.


    • Options
    • A. Johnson counter
    • B. ring counter
    • C. decade counter
    • D. BCD counter
      • Discuss
    • 4. In VHDL, if we need to remember a value it must be stored in a ________.

    • Options
    • A. function
    • B. type declaration
    • C. variable
    • D. process
      • Discuss
    • 5. The counter circuit and associated waveforms shown below are for a(n) ________ counter, and the correct output waveform for QB is shown by waveform ________.


    • Options
    • A. synchronous, a
    • B. asynchronous, b
    • C. synchronous, c
    • D. asynchronous, d
      • Discuss
    • 6. A BCD counter has ________ states.

    • Options
    • A. 8
    • B. 9
    • C. 10
    • D. 11
      • Discuss
    • 7. The duty cycle of the most significant bit from a 4-bit (0?9) BCD counter is ________.

    • Options
    • A. 10%
    • B. 20%
    • C. 50%
    • D. 80%
      • Discuss
    • 8. The circuit shown below is used for ________, and for the inputs shown, the DATA output will be ________.


    • Options
    • A. multiplexing, 1
    • B. parallel-to-serial conversion, 0
    • C. demultiplexing, 0
    • D. parallel-to-serial conversion, HIGH
      • Discuss
    • 9. In order to check the CLR function of a counter, ________.

    • Options
    • A. apply the active level to the CLR input and check all of the Q outputs to see if they are all in their reset state
    • B. ground the CLR input and check to be sure that all of the Q outputs are LOW
    • C. connect the CLR input to Vcc and check to see if all of the Q outputs are HIGH
    • D. connect the CLR to its correct active level while clocking the counter; check to make sure that all of the Q outputs are toggling
      • Discuss
    • 10. A decade counter will count through decimal ________.

    • Options
    • A. 10
    • B. 9
    • C. 15
    • D. 0
      • Discuss

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