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  • Question

  • The circuit shown below is a ________.

    The circuit shown below is a ________. parallel in/serial out register serial in/parallel load regis


  • Options
  • A. parallel in/serial out register
  • B. serial in/parallel load register
  • C. multiplexer
  • D. demultiplexer

  • Correct Answer
  • parallel in/serial out register 

    • Counters problems

    Search Results

    • 1. ________ is the modulus of the counter shown below.


    • Options
    • A. 200
    • B. 19
    • C. 0.005
    • D. 5000
      • Discuss
    • 2. In general, when using a scope to troubleshoot digital systems the instrument should be triggered by ________.

    • Options
    • A. the A channel or channel 1
    • B. the vertical input mode, when using more than one channel
    • C. the system clock
    • D. line sync, in order to observe troublesome power line glitches
      • Discuss
    • 3. One characteristic of a ring counter is that the modulus is equal to the number of flip-flops in the register and, consequently, there are never any unused or invalid states.

    • Options
    • A. True
    • B. False
      • Discuss
    • 4. The terminal marked A on the CTR block in the given figure is the SET terminal.


    • Options
    • A. True
    • B. False
      • Discuss
    • 5. A parallel in/serial out shift register enters all data bits simultaneously and transfers them out one bit at a time.

    • Options
    • A. True
    • B. False
      • Discuss
    • 6. The minimum number of flip-flops that can be used to construct a modulus-5 counter is ________.

    • Options
    • A. 3
    • B. 5
    • C. 8
    • D. 10
      • Discuss
    • 7. Referring to the function table given below, taking the CLEAR, S1, and S0 inputs all HIGH ________.


    • Options
    • A. will inhibit the operation of the register
    • B. will reset the parallel registers and inhibit the serial data inputs
    • C. will cause the parallel data inputs to be loaded and passed to the parallel data outputs
    • D. will depend on what values are loaded into the parallel data inputs
      • Discuss
    • 8. A D flip-flop can be made to toggle by ________.

    • Options
    • A. connecting to Q to D
    • B. connecting to Q to D
    • C. connecting D low
    • D. connecting D high
      • Discuss
    • 9. The counter circuit and associated waveforms shown below are for a(n) ________ counter, and the correct output waveform for QB is shown by waveform ________.


    • Options
    • A. synchronous, a
    • B. asynchronous, b
    • C. synchronous, c
    • D. asynchronous, d
      • Discuss
    • 10. In VHDL, if we need to remember a value it must be stored in a ________.

    • Options
    • A. function
    • B. type declaration
    • C. variable
    • D. process
      • Discuss

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