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  • Question
  • Basic counters can be cascaded in parallel to increase the number of data bits that the counter can handle.


  • Options
  • A. True
  • B. False

  • Correct Answer
  • False 


  • Counters problems


    Search Results


    • 1. A serial in/serial out shift register transfers data from one line of a parallel bus to another line one bit at a time.

    • Options
    • A. True
    • B. False
    • Discuss
    • 2. The concept of a counter to implement a digital one-shot using HDL is not used.

    • Options
    • A. True
    • B. False
    • Discuss
    • 3. Cascade means to connect the Q output of one flip-flop to the clock input of the next.

    • Options
    • A. True
    • B. False
    • Discuss
    • 4. All flip-flops in an asynchronous counter change states at the same time.

    • Options
    • A. True
    • B. False
    • Discuss
    • 5. A state diagram is a table of states.

    • Options
    • A. True
    • B. False
    • Discuss
    • 6. The serial in/parallel out shift register transfers data from one parallel data bus to another parallel data bus one bit at a time across a single line.

    • Options
    • A. True
    • B. False
    • Discuss
    • 7. In a full-featured counter in HDL, the concept of rolling over simply means the count sequence has reached its limit and must start over at the beginning of the sequence.

    • Options
    • A. True
    • B. False
    • Discuss
    • 8. A reliable method for eliminating decoder spikes is to use strobing.

    • Options
    • A. True
    • B. False
    • Discuss
    • 9. Dependency notation is no longer used.

    • Options
    • A. True
    • B. False
    • Discuss
    • 10. Most sequential circuits contain a combinational logic section and a memory section.

    • Options
    • A. True
    • B. False
    • Discuss


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