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  • Question
  • To design a divide-by-200 counter using synchronous counters, two 4-bit counters could be cascaded together to form an 8-bit counter.


  • Options
  • A. True
  • B. False

  • Correct Answer
  • True 


  • Counters problems


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    • 1. In a synchronous counter, each state is clocked by the same pulse.

    • Options
    • A. True
    • B. False
    • Discuss
    • 2. The MOD number of a Johnson counter will always be equal to one-half the number of flip-flops in the counter.

    • Options
    • A. True
    • B. False
    • Discuss
    • 3. When a J-K flip-flop is used in a circuit, we only have to consider the level at J and K at the active clock edge to know the states of the outputs.

    • Options
    • A. True
    • B. False
    • Discuss
    • 4. An asynchronous counter differs from a synchronous counter in the method of clocking.

    • Options
    • A. True
    • B. False
    • Discuss
    • 5. Phototransistors have varying resistance from collector to emitter, depending on how much light strikes them.

    • Options
    • A. True
    • B. False
    • Discuss
    • 6. Another term used to describe up/down counters is bidirectional.

    • Options
    • A. True
    • B. False
    • Discuss
    • 7. A state diagram is a table of states.

    • Options
    • A. True
    • B. False
    • Discuss
    • 8. All flip-flops in an asynchronous counter change states at the same time.

    • Options
    • A. True
    • B. False
    • Discuss
    • 9. Cascade means to connect the Q output of one flip-flop to the clock input of the next.

    • Options
    • A. True
    • B. False
    • Discuss
    • 10. The concept of a counter to implement a digital one-shot using HDL is not used.

    • Options
    • A. True
    • B. False
    • Discuss


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